Measurement instruments for acquiring both analog signals and logic or digital signals and displaying the acquired signals are well known as mixed signal oscilloscopes. The mixed signal oscilloscopes have become ubiquitous of late. These instruments augment traditional oscilloscope capabilities with the addition of digital signal capture. Therefore, such instruments are regarded as a combination of an oscilloscope and a “mini logic analyzer” wherein an acquisition timing of the analog signals is aligned with that of the logic signals. The “mini logic analyzer” channels extend the acquisition to more channels, suitable for use on logic signals. These extra channels can provide valuable insight when debugging embedded systems.
Referring now to FIG. 1, a perspective view of a conventional mixed oscilloscope 10 is illustrated. The mixed oscilloscope 10 comprises the mini logic analyzer circuit and the oscilloscope circuit within a housing 12 and further comprises four analog input interface 14 and a logic input interface 16 having 8-channel input terminals on a front panel of the housing 12. The front panel includes a display screen 18 and plural control knobs and push buttons. FIG. 2 shows a magnified view of one of analog input interfaces 14 wherein this interface comprises a BNC type input connector 20 and six auxiliary contacts 22 for recognizing a probe type, applying power to the probe, communicating between the probe and the oscilloscope 10. The basic principle of this analog interface is discussed in U.S. Pat. No. 6,402,565 (William R. Pooley, et al.), issued 11 Jun. 2002, entitled “Electronic Interconnect Device for High Speed Signal and Data Transmission”, and assigned to the same assignee as is the subject invention.
FIG. 3 is a block diagram of the conventional mixed signal oscilloscope 10. Four channel analog input signals at four connectors 200-203 of the analog input interface 14 are applied to conditioning circuits 240-243 for conditioning amplitudes or the like of the input signals. The conditioned analog signals are digitized by analog-to-digital (A/D) converters 260-263 into, for example, 8-bit digital signals respectively. These digital signals are stored in an acquisition memory 30 through decimators 280-283. Eight channel logic input signals at eight connectors 160-167 of the digital interface 16 are applied to eight latch circuits 340-347 through eight comparators 320-327 respectively wherein comparators 322-325 and latch circuits 342-345 are not illustrated in FIG. 3 to simplify the drawing. Each of the comparators 320-327 compares the input logic signal with a predetermined threshold level to generate a “High” logic signal when the input logic signal is higher than the threshold level and a “Low” logic signal when the input logic signal is lower than the threshold level. These logic signals from the comparators 320-327 are latched by the latch circuits 340-347. The latched logic signals from the latch circuits 340-347 are stored in the acquisition memory 30 through an 8-bit decimator 36. A clock signal from a clock generator 40 is applied to the A/D converters 260-263 and the latch circuits 340-347 so that the logic acquisition timing is aligned with the analog acquisition timing.
The stored digital signals corresponding to the logic input signals and the analog input signals are transferred to a display controller/memory block 42 wherein the display controller rasterizes the digital signals, stores these signals in the display memory and then displays waveforms of the analog and logic input signals on the display screen 18. A controller 44 comprises a microprocessor 46, a memory 48 and an input device 50, such as the control knobs and push buttons shown in FIG. 1. The microprocessor 46 controls operations of blocks 240-243, 280-283, 36, 40, 30 and 42 in accordance with program stored in the memory 48 and instructions from the input device 50. Although a trigger circuit is not shown in FIG. 3 to simplify the drawing, the trigger circuit generates a trigger signal by comparing the signals from the conditioning circuits 240-243 or the output from the A/D converters 260-263 and/or the signals from the latch circuits 340-347 with a trigger condition set by the controller 44. The trigger signal controls which part of the input signals are stored in the acquisition memory 30.
One of the ongoing questions with mixed signal oscilloscopes is how many logic channels to provide. In the interest of simplicity and cost-effectiveness, most instruments have standardized on 16 additional logic channels although FIG. 3 shows only 8 logic channels. While this meets the needs of most customers, there are still applications where additional channels are needed. In addition, users often do not need all of the analog acquisition capabilities, particularly on a 4 channel mixed signal oscilloscope.
There are a number of “specialized” capabilities that have been, or are being added to oscilloscopes to extend their acquisition capabilities. These include, but are not limited to (1) high vertical resolution (10 or 12-bits) and (2) triggering and acquiring high-speed serial data signals. These capabilities are typically found in specialized instruments. There are a few high resolution products, but they are expensive and built by niche companies. The high-speed serial data acquisition has been limited to high-bandwidth oscilloscopes. Typically, the data acquisition is analog, with conversion to digital taking place as a secondary process.
What is needed is a system and method for allowing the user to configure the instrument, with respect to the number of analog and digital channels in use. In addition, what is needed is a method for providing specialized acquisition capabilities in the form of an accessory for mainstream mixed domain oscilloscopes.